PT12: Motion adaptive video/image noise reducer IP core

PT8: Multi-standard, broadcast quality, video encoder IP core

PT13: Very compact microprocessor for CPLDs and small FPGAs

PT6: Video Pattern Generator IP core

DP2 is an Altera FPGA development board aimed particularly for cost sensitive audio and video applications, for example in security or consumer electronics.

The heart of the board is an Altera EP2C8 FPGA which provides the perfect balance between sufficient resources, (for example two independent PT3 video decoders can fit in one device), and low cost to enable applications in the most cost sensitive applications. All of Singmai's IP cores will run on this platform.

• EP2C8 FPGA can demonstrate all SingMai IP cores.
• Two piggyback board expansion connectors: one compatible with DP1, the other with DP3.
• Digital encoder for analogue control functions.
• Two hexadecimal LED displays
• 5 Pushbuttons
• Optical audio transmitter and receiver
• 27MHz crystal oscillator
• Connector for Optrex LCD display (not supplied)
• USB interface
• Infra-red receiver
• Serial EEPROM (EPCS4) for standalone operation
• All linear power supplies for the highest performance ADC and DAC operation.
• Comes with example FPGA designs, AC-DC converter.

DP2 Schematics

DP2 Instruction manual

EP2C8 datasheet

TIL311 Hex display

Bourns optical encoder

DLP-USB245 USB interface

AC-DC converter

EPCS4 EEPROM configuration device

PT5: Multi-standard Video decoder IP core with 3D comb filter/noise reduction

PT9: Broadcast quality video encoder with component outputs

PT2: Video Character Generator IP core with programmable characters

PT29: Program Delivery Control extractor