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PT8: Multi-standard video encoder IP core

PT13: Very compact microprocessor IP core

PT6: Video Pattern Generator IP core

PT13 is an embedded microprocessor IP core intended for simple control operations

Many applications would benefit from a small degree of local ‘intelligence’ and PT13 is designed for that very function. Whilst most available microprocessor IP cores require external FLASH memory and even external data memory, PT13 is optimized to be completely embedded and use as little FPGA resources as possible.

PT13 uses just 316 logic elements and as little as a single 4kbit ROM block, allowing it to fit in the smallest of FPGAs or even permit multiple instances in the same FPGA.

Yet PT13 can address up to 16kB of program memory and 4kB of user memory or memory mapped I/O peripherals and has over 45 instructions. An editor and assembler allow easy generation of code which is directly compiled into the FPGA download file.

PT13 is ideal in real time control applications allowing such functions as TV tuner control, I2C control, RC5/RC6 decoding, LCD display control, user interface control, closed caption/Teletext decoding and general housekeeping duties to be run without burdening the main control processor. These functions can also be run in very low power applications such as STB/DVD recorder standby conditions or mobile applications.

PT13 is supplied either as an encrypted 'black-box' file with a fixed 3 year renewable unlimited use license, (Altera only, lower cost), or as an unlimited time, unlimited use license, (all vendors and ASIC/IC). Source code files are supplied as RTL compliant Verilog. PT13 is supplied with 6 months telephone/e-mail support and a 3 year update and bug fix guarantee.

Please contact SingMai if you wish to arrange a demonstration of the core or for pricing: sales@singmai.com.

Block diagram of PT13 microprocessor IP core

 

Instruction

Hex Code

Address Mode

Description

Arithmetic

ADD A,mm

$50 mm

Immediate

Add value $mm to accumulator A

ADD B,mm

$51 mm

Immediate

Add value $mm to accumulator B

ADD A,B

$54

Inherent

Add accumulator B to Accumulator A, the result is in Accumulator A

SUB A,mm

$58 mm

Immediate

Subtract value $mm from accumulator A

SUB B,mm

$59 mm

Immediate

Subtract value $mm from accumulator B

SUB A,B

$5C

Inherent

Subtract accumulator B from Accumulator A, the result is in Accumulator A

Logic

AND A,mm

$60 mm

Immediate

AND Accumulator A with value $mm

AND B,mm

$61 mm

Immediate

AND Accumulator B with value $mm

AND A,B

$64

Inherent

AND Accumulator A with Accumulator B

OR A,mm

$68 mm

Immediate

OR Accumulator A with value $mm

OR B,mm

$69 mm

Immediate

OR Accumulator B with value $mm

OR A,B

$6C

Inherent

OR Accumulator A with Accumulator B

XOR A,mm

$70 mm

Immediate

XOR Accumulator A with value $mm

XOR B,mm

$71 mm

Immediate

XOR Accumulator B with value $mm

XOR A,B

$74

Inherent

XOR Accumulator A with Accumulator B

LSL A

$78

Inherent

Logical shift left Accumulator A. D7..D0 > D6..D0,0

LSL B

$79

Inherent

Logical shift left Accumulator B. D7..D0 > D6..D0,0

LSR A

$7C

Inherent

Logical shift right Accumulator A. D7..D0 > 0,D7..D1

LSR B

$7D

Inherent

Logical shift right Accumulator B. D7..D0 > 0,D7..D1

ASR A

$80

Inherent

Arithmetic shift left Accumulator A. C,D7..D0 > D0,D7,D7..D1

ASR B

$81

Inherent

Arithmetic shift left Accumulator B. C,D7..D0 > D0,D7,D7..D1

ROL A

$84

Inherent

Rotate left Accumulator A. D7..D0 > D6..D0,D7

ROL B

$85

Inherent

Rotate left Accumulator B. D7..D0 > D6..D0,D7

ROR A

$88

Inherent

Rotate right Accumulator A. D7..D0 > D0,D7..D1

ROR B

$89

Inherent

Rotate right Accumulator B. D7..D0 > D0,D7..D1

Branch

BCC A,addr

$E0 addr

Relative

Branch if accumulator A carry clear to signed offset addr (14 bit value)

BCC B,addr

$E1 addr

Relative

Branch if accumulator B carry clear to signed offset addr (14 bit value)

BCS A,addr

$E4 addr

Relative

Branch if accumulator A carry set to signed offset addr (14 bit value)

BCS B,addr

$E5 addr

Relative

Branch if accumulator B carry set to signed offset addr (14 bit value)

BEQ A,addr

$E8 addr

Relative

Branch if accumulator A = $00 to signed offset addr (14 bit value)

BEQ B.addr

$E9 addr

Relative

Branch if accumulator B = $00 to signed offset addr (14 bit value)

BNE A,addr

$EC addr

Relative

Branch if accumulator A ≠ $00 to signed offset addr (14 bit value)

BNE B,addr

$ED addr

Relative

Branch if accumulator A ≠ $00 to signed offset addr (14 bit value)

BRA addr

$FC addr

Relative

Branch always to signed offset addr (14 bit value)

BSR

$FD addr

Relative

Branch to subroutine at signed offset addr

RTS

$FE

Inherent

Return from subroutine

Load and Store

LDI A,mm

$10 mm

Immediate

Load accumulator A with data $mm

LDI B,mm

$11 mm

Immediate

Load accumulator B with data $mm

LDI DP,mm

$12 mm

Immediate

Load Data Page register with data $mm

LDD A,of

$18 of

Direct

Load accumulator A with data from program memory location $DP,of where DP is the Data page register and 'of' is an 8 bit address offset

LDD B,of

$19 of

Direct

Load accumulator B with data from program memory location $DP,of where DP is the Data page register and 'of' is an 8 bit address offset

LDRI

$1C

Indexed

Load accumulator A with data from program memory location $DP,B where DP is the Data page register and B is accumulator B

LDR A

$20 of

Direct

Load accumulator A with data from RAM location $DPof where DP is the Data page register

LDR B

$21 of

Direct

Load accumulator B with data from RAM location $DPof where DP is the Data page register

STR A

$24 of

Direct

Store accumulator A into RAM location $DPof where DP is the Data page register

STR B

$25 of

Direct

Store accumulator B into RAM location $DPof where DP is the Data page register

Control

NOP

$00

Inherent

No operation (delay 4 cycles)

Download the PT13 user manual

Download the Context editor

This is the highlighter file for use with the Context editor

(PT13 Assembler.chl) 

The executable code for the assembler

(as13.exe) 

 

 

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