PT6 is a line based SD video pattern generator IP core for Altera FPGAs.
PT6 generates 5 10-bit, line based, video patterns which can be used for the testing of video transmission paths. PT6 just requires a 27MHz clock whilst the output is a compatible BT656 video stream for both 525 and 625 line formats. The pattern memories may also be written to by the user for creating custom patterns and also multiplexed into a single frame.
The patterns are:
- 75% colour bars (for measuring chrominance and luminance levels and vectors)
- 2T, 20T pulse and bar (for measuring pulse response - K- factor - and chroma/luma delay)
- Modulated 5-step staircase (for measuring linearity and differential gain and phase)
- Multiburst (for measuring frequency response)
- Modulated ramp (for measuring signal to noise ratio).
Control and memory are written to and read from using a conventional 8 bit wide microprocessor interface.
Please contact SingMai if you wish to arrange a demonstration of the core, enquiries@singmai.com.
The core is supplied as a compiled and encrypted design file for Altera FPGAs and the prices are for a one-off payment which allows unlimited use of the core for a period of 3 years. The core is supplied with 6 months telephone/e-mail support and a 3 year update and bug fix guarantee. After this time the IP core license can be renewed.
For other FPGA vendors, for ASIC applications and for alternative license arrangements please contact SingMai at the e-mail address above.
Logic Elements |
Memory Bits |
M4K blocks |
9x9 Multipliers |
18x18 multipliers |
409 |
76800 |
20 |
0 |
0 |
Full information can be found in the user manual. If you require any further information or a formal quotation please contact enquiries@singmai.com
Download the PT6 user manual
